Use even faster and smaller PIO implemenation and add delay navswitch to fix read
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+7
-7
@@ -69,25 +69,25 @@ typedef enum pio_config_enum
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/** Define a PIO as a unique 16 bit number encoding the low part of
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the PORT address in the low byte and the bit mask in the high
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byte. PORTB is used for the pattern since PORTA is not always
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defined for some AVRs. */
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#define PIO_DEFINE(PORT, PORTBIT) (((((PORT) - PORT_B) * 3 + (uint16_t) (&PORTB)) & 0xff) + (BIT(PORTBIT) << 8))
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the PORT address offset in the low byte and the bit mask in the
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high byte. PORTB is used for the pattern since PORTA is not
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always defined for some AVRs. */
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#define PIO_DEFINE(PORT, PORTBIT) ((((PORT) - PORT_B) * 3) | (BIT(PORTBIT) << 8))
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/** Private macro to lookup bitmask. */
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#define PIO_BITMASK_(pio) (pio >> 8)
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#define PIO_BITMASK_(PIO) ((PIO) >> 8)
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/** Private macro to lookup port register. */
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#define PIO_PORT_(pio) ((pio_port_t)(pio & 0xff))
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#define PIO_PORT_(PIO) (&PORTB + ((PIO) & 0xff))
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/** Private macro to map a pio to its corresponding data direction
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register (DDR). NB, the DDR and PORT registers must be separated
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by the same number of bytes in all cases. PORTB is used for the
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pattern since PORTA is not always defined for some AVRs. */
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#define PIO_DDR_(pio) (*(PIO_PORT_ (pio) + (&DDRB - &PORTB)))
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#define PIO_DDR_(PIO) (*(PIO_PORT_ (PIO) + (&DDRB - &PORTB)))
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/** Private macro to map a pio to its input register (PIN). NB, the
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PIN and PORT registers must be separated by the same number of
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